Chennai: IIT Madras, in collaboration with the Ministry of Electronics and Information Technology (MeitY), RISC-V International, and industry leaders, hosted the second Digital India RISC-V (DIR-V) Symposium on 2nd and 3rd March 2025 at IIT Madras Research Park.
The event aimed to boost India's semiconductor self-reliance under initiatives like 'Digital India' and 'Make in India.'
The symposium gathered experts from academia, industry, and startups to discuss RISC-V processor design, open-source hardware, and India's semiconductor roadmap. RISC-V International, a non-profit global body, supports open-standard RISC-V Instruction Set Architecture (ISA) development with over 4,200 members across 70 countries.

Leadership & Vision
Introducing the Chief Guest, Former Union Minister of State Shri Rajeev Chandrasekhar, IIT Madras Director Prof. V. Kamakoti credited him as the driving force behind DIR-V. Shri Rajeev Chandrasekhar stated, “India has transitioned from being absent in semiconductors to systematically establishing a presence. By 2026-27, we will have a 28 nm semiconductor fab in Gujarat and a growing DIR-V ecosystem.”

RISC-V's Potential
Prof. Kamakoti emphasized the role of RISC-V in enabling startups to develop efficient domain-specific System-on-Chips (SoCs). The event facilitated collaboration among chip designers, OEMs, and industry stakeholders.

Key Takeaways:
Strengthening India's semiconductor ecosystem through RISC-V.
Industry-academia partnerships for research and commercialization.
Showcasing AI, IoT, and high-performance computing applications.

IIT Madras, a leader in RISC-V research with its SHAKTI processor family, continues to drive innovation through its RISC-V Knowledge Center (RKCoE).