IIT Madras hosts 2nd Digital India RISC-V (DIR-V) symposium

chennai: iit madras, in collaboration with the ministry of electronics and information technology (meity), risc-v international, and industry leaders, hosted the second digital india risc-v (dir-v) symposium on 2nd and 3rd march 2025 at iit madras research park. the event aimed to boost india's semiconductor self-reliance under initiatives like 'digital india' and 'make in india.'the symposium gathered experts from academia, industry, and startups to discuss risc-v processor design, open-source hardware, and india's semiconductor roadmap. risc-v international, a non-profit global body, supports open-standard risc-v instruction set architecture (isa) development with over 4,200 members across 70 countries.leadership & visionintroducing the chief guest, former union minister of state shri rajeev chandrasekhar, iit madras director prof. v. kamakoti credited him as the driving force behind dir-v. shri rajeev chandrasekhar stated, “india has transitioned from being absent in semiconductors to systematically establishing a presence. by 2026-27, we will have a 28 nm semiconductor fab in gujarat and a growing dir-v ecosystem.”risc-v's potentialprof. kamakoti emphasized the role of risc-v in enabling startups to develop efficient domain-specific system-on-chips (socs). the event facilitated collaboration among chip designers, oems, and industry stakeholders.key takeaways:strengthening india's semiconductor ecosystem through risc-v.industry-academia partnerships for research and commercialization.showcasing ai, iot, and high-performance computing applications.iit madras, a leader in risc-v research with its shakti processor family, continues to drive innovation through its risc-v knowledge center (rkcoe).